DocumentCode
2349215
Title
Surface potential based model of ultra-thin fully depleted SOI MOSFET for IC simulations
Author
Rozeau, Olivier ; Jaud, Marie-Anne ; Poiroux, Thierry ; Benosman, Mohamed
fYear
2011
fDate
3-6 Oct. 2011
Firstpage
1
Lastpage
22
Abstract
The paper presents the model´s core of fully depleted SOI MOSFET transistor. The model validated on UTSOI technology including temperature dependence. This model is implemented in VerilogA language, compatible with all commercial circuit simulators. Validation of this compact model performed with Eldo 2010.2, HSPICE 2009.09 and ADS 2006. Introduction of this model into commercial IC simulator in progress.
Keywords
MOSFET; SPICE; circuit simulation; integrated circuit modelling; semiconductor device models; silicon-on-insulator; surface potential; ADS 2006; Eldo 2010; HSPICE 2009.09; IC simulations; UTSOI technology; VerilogA language; circuit simulators; surface potential based model; temperature dependence; ultra-thin fully depleted SOI MOSFET; Equations; Integrated circuit modeling; Logic gates; Mathematical model; Parameter extraction; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference (SOI), 2011 IEEE International
Conference_Location
Tempe, AZ
ISSN
1078-621X
Print_ISBN
978-1-61284-761-0
Electronic_ISBN
1078-621X
Type
conf
DOI
10.1109/SOI.2011.6081682
Filename
6081682
Link To Document