• DocumentCode
    2349247
  • Title

    TCAD study of back-gate biasing in UTBB

  • Author

    Hook, Terence B. ; Furkay, Stephen ; Kulkarni, Pranita ; Monsieur, Frederic

  • Author_Institution
    IBM SRDC, Essex Junction, VT, USA
  • fYear
    2011
  • fDate
    3-6 Oct. 2011
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    We have shown here a comprehensive set of results on the coupling factor in a UTBB technology based on TCAD simulation. An interesting result is the degree to which the coupling factor is not constant across the possible realistic range of biases, and that not only back-gate depletion may play a role, but fixed charges and work function variation change the behavior. This suggests that these dependencies may be used to characterize those important variables, and also indicates that use of the back-gate in circuit operation must take into account the variation in coupling factor across the practical operating range.
  • Keywords
    circuit CAD; transistor circuits; transistors; TCAD simulation; UTBB technology; back-gate biasing; back-gate depletion; circuit operation; coupling factor; work function variation; Couplings; Dielectrics; Doping; Electric potential; Logic gates; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference (SOI), 2011 IEEE International
  • Conference_Location
    Tempe, AZ
  • ISSN
    1078-621X
  • Print_ISBN
    978-1-61284-761-0
  • Electronic_ISBN
    1078-621X
  • Type

    conf

  • DOI
    10.1109/SOI.2011.6081684
  • Filename
    6081684