DocumentCode
234928
Title
Porous silicon technology, a breakthrough for silicon photonics: From packaging to monolithic integration
Author
Balucani, Marco ; Klyshko, A. ; Kholostov, K. ; Benedetti, A. ; Belardini, A. ; Sibilia, C. ; Izzi, Massimo ; Tucci, Mauro ; Bandarenka, H. ; Bondarenko, V.
Author_Institution
DIET, Sapienza Univ. of Rome, Rome, Italy
fYear
2014
fDate
27-30 May 2014
Firstpage
194
Lastpage
202
Abstract
Low cost concept based on the porous silicon technology is shown to be well suitable for integrating monolithically the photonic devices on a standard silicon wafers by using localized SOI structures fabricated by electrochemical anodization of silicon wafers followed by thermal oxidation of porous silicon. The new approach consists in realizing buried localized porous oxidized silicon by exploiting two different routes: n- epi/n+/n- structures on p-type wafers and ion-implantation on standard CMOS/BiCMOS wafers. The peculiarities of the developed approach, including anodization and thermal oxidation regimes to form oxidized porous silicon regions with the required properties are presented. The advantages of the proposed approach in realizing the fiber-to-chip and power-over-fiber coupling are discussed.
Keywords
BiCMOS integrated circuits; anodisation; elemental semiconductors; ion implantation; oxidation; porous semiconductors; silicon; silicon-on-insulator; wafer level packaging; Si; electrochemical anodization; fiber-to-chip coupling; ion implantation; localized SOI structures; monolithic integration; n- epi-n+-n- structures; p-type wafers; packaging; photonic devices; porous silicon technology; power-over-fiber coupling; silicon photonics; standard CMOS-BiCMOS wafers; standard silicon wafers; thermal oxidation; Couplings; Optical fiber sensors; Optical fibers; Silicon photonics;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th
Conference_Location
Orlando, FL
Type
conf
DOI
10.1109/ECTC.2014.6897288
Filename
6897288
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