DocumentCode :
2349308
Title :
Method for direct characterizing interface traps in STI-type high voltage SOI LDMOSFETs
Author :
He, Yandong ; Zhang, Ganggang
Author_Institution :
Key Laboratary of Microelectron. Devices & Circuits, Peking Univ., Beijing, China
fYear :
2011
fDate :
3-6 Oct. 2011
Firstpage :
1
Lastpage :
2
Abstract :
Based on the forward gated diode recombination current, a method for direct characterizing interface traps in 60V STI lateral high voltage SOI MOSFETs was proposed. Thus the interface traps induced by off-state or hot carrier stresses can be directly located by distinct peaks in the forward gated diode recombination current. The method was also investigated by 2D device simulation and reliability experiments.
Keywords :
MOSFET; hot carriers; interface states; semiconductor device reliability; silicon-on-insulator; 2D device simulation; STI-type high voltage SOI LDMOSFET; direct characterizing interface traps; forward gated diode recombination current; hot carrier stresses; off-state stresses; reliability experiments; voltage 60 V; Current measurement; Logic gates; Semiconductor device reliability; Stress; Substrates; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference (SOI), 2011 IEEE International
Conference_Location :
Tempe, AZ
ISSN :
1078-621X
Print_ISBN :
978-1-61284-761-0
Electronic_ISBN :
1078-621X
Type :
conf
DOI :
10.1109/SOI.2011.6081687
Filename :
6081687
Link To Document :
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