Title :
A proposed high manufacturability strain technology for high-k/metal gate SiGe-SOI CMOSFET
Author :
Yeh, W.K. ; Cheng, C.Y. ; Yang, Y.L. ; Lin, C.T. ; Lai, C.M. ; Chen, Y.W. ; Hsu, C.H. ; Yang, C.W. ; Chen, P.Y.
Author_Institution :
Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan
Abstract :
We demonstrated a high-k/metal gate-last SiGe-SOI CMOSFET process with optimized strain technology for high performance concerns. The impact of SOI thickness and strain from Ge, CESL, and high-k material/metal-gate are inspected. An appropriate post treatment is proposed to improve quality of stack Hf-based dielectric. We achieved a high manufacturability 28nm SiGe-SOI channel Hf-based high-k/TiN-based metal-gate last CMOSFET with good VT roll-off, lower device leakage and better reliability.
Keywords :
Ge-Si alloys; MOSFET; hafnium; high-k dielectric thin films; semiconductor device manufacture; semiconductor device reliability; titanium compounds; Hf; SiGe; TiN; device leakage; device reliability; high manufacturability strain technology; high-k-metal gate-last-SOI CMOSFET process; post treatment; size 28 nm; stack-based dielectric quality; High K dielectric materials; Logic gates; Metals; Silicon; Silicon germanium; Strain; Stress;
Conference_Titel :
SOI Conference (SOI), 2011 IEEE International
Conference_Location :
Tempe, AZ
Print_ISBN :
978-1-61284-761-0
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2011.6081699
