Title :
High-Performance Diagnostic Fault Simulation on GPUs
Author :
Li, Min ; Hsiao, Michael S.
Author_Institution :
Bradley Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
Abstract :
In this paper, we present an efficient diagnostic fault simulator based on a state-of-the-art graphics processing unit (GPU). Diagnostic fault simulation plays an important role to identify and locate the causes of circuit failures. However, today´s complex VLSI circuits pose ever higher computational demand for such simulators. Our GPU based diagnostic fault simulator (GDSim) is based on a novel two-stage simulation framework which exploits high computation efficiency on the GPU. The fault pair based simulation is proposed to overcome the limited capacity of GPU memory as well as achieve a substantial fine-grained parallelism. Multi-fault-signature and dynamic load balancing techniques are introduced for the best usage of computing resources on-board. Experimental results demonstrate a speedup of up to 121× (with average speedup of 38.43×) compared to a state-of-the-art CPU-based diagnostic fault simulator.
Keywords :
circuit simulation; coprocessors; electronic engineering computing; fault simulation; integrated circuit modelling; integrated circuit testing; GPU; VLSI circuits; circuit failure; dynamic load balancing techniques; fine grained parallelism; graphics processing unit; high performance diagnostic fault simulation; multifault signature; two stage simulation framework; Acceleration; Benchmark testing; Circuit faults; Graphics processing unit; Integrated circuit modeling; Logic gates; Parallel processing; compute unified device architecture (CUDA); diagnostic faut simulation; general-purpose computing on graphics processing unit (GPGPU); parallel algorithm;
Conference_Titel :
Test Symposium (ETS), 2011 16th IEEE European
Conference_Location :
Trondheim
Print_ISBN :
978-1-4577-0483-3
Electronic_ISBN :
1530-1877
DOI :
10.1109/ETS.2011.41
