BJT effect analysis in p- and n-SOI MuGFETs with high-k gate dielectrics and TiN metal gate electrode for a 1T-DRAM application

Author

Galeti, M. ; Rodrigues, M. ; Martino, J.A. ; Collaert, N. ; Simoen, E. ; Aoulaiche, M. ; Jurczak, M. ; Claeys, C.

Author_Institution

LSI/PSI, Univ. of Sao Paulo, Sao Paulo, Brazil

fYear

2011

fDate

3-6 Oct. 2011

Firstpage

1

Lastpage

2

Abstract

This paper presents an analysis of the bipolar effect in triple gate n-and p-SOI devices with high-k/TiN metal gate. High-k dielectrics and thicker TiN achieve a larger trigger voltage. However, a reduced program window is found for MuGFETs with high-k dielectrics. p-FET devices give rise to a smaller sense margin and program window due to the reduced hole mobility. Narrow fin devices exhibit a larger trigger voltage and reduced program window and sense margin for a given Vds.

Keywords

DRAM chips; bipolar transistors; electrodes; field effect transistors; silicon-on-insulator; titanium compounds; 1T-DRAM application; BJT effect analysis; TiN; high-k gate dielectrics; metal gate electrode; n-SOI MuGFET; narrow fin devices; p-FET devices; p-SOI MuGFET; reduced hole mobility; reduced program window; triple gate n-SOI devices; triple gate p-SOI devices; Capacitance; Dielectrics; High K dielectric materials; Logic gates; Tin; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference (SOI), 2011 IEEE International

Conference_Location

Tempe, AZ

ISSN

1078-621X

Print_ISBN

978-1-61284-761-0

Electronic_ISBN

1078-621X

Type

conf

DOI

10.1109/SOI.2011.6081720

Filename

6081720