Title :
On High-Quality Test Pattern Selection and Manipulation
Author :
Yuan, Feng ; Liu, Xiao ; Xu, Qiang
Author_Institution :
Dept. of Comput. Sci. & Eng., Chinese Univ. of Hong Kong, Hong Kong, China
Abstract :
With a given test set, this paper is concerned about selecting a subset of test patterns and manipulating them into high-quality ones that reduce both under-testing and over-testing, which are both serious concerns for the semiconductor industry with technology scaling. Experimental results on IWLS´05 benchmark demonstrate the effectiveness of the proposed solution.
Keywords :
automatic test pattern generation; integrated circuit testing; semiconductor device testing; high-quality test pattern selection; semiconductor industry; Automatic test pattern generation; Circuit faults; Delay; Europe; Noise; Pseudo-functional testing; test escape; test overkill; test pattern selection;
Conference_Titel :
Test Symposium (ETS), 2011 16th IEEE European
Conference_Location :
Trondheim
Print_ISBN :
978-1-4577-0483-3
Electronic_ISBN :
1530-1877
DOI :
10.1109/ETS.2011.49
