Detailed evaluation of different inversion layer electron and hole mobility models

With the increasing complexity of submicron device phenomena, efficient and accurate device simulators are indispensable. Carrier mobility is one of the most important parameters required to accurately predict MOSFET terminal characteristics. Numerous models for carrier mobility for both the inversion layer and bulk silicon have been reported in the literature. Several choices are usually available with regard to the selection of mobility models in device simulators. This study presents a comparative and detailed examination of the various inversion layer and bulk mobility models that reside in popular device simulators. MOSFET I-V characteristics have been simulated and compared with the experimental data of 10 different sets of MOS devices fabricated with different processes. The device data, obtained from different industrial and university sources, include both NMOS and PMOS devices, and both LDD and non-LDD devices with effective channel lengths varying from 0.22 μm to 9.1 μm. About 1800 PISCES simulations have been performed to complete this study, in which the maximum percentage difference and the rms error value between the experimental and simulated drain current have been used as the comparison criteria. It has been observed that among the selected inversion layer drift-diffusion models, the University of Texas at Austin effective-field based local-field dependent models for both electrons and holes provided consistently better agreement over the wide range of experimental data