DocumentCode
2349948
Title
High density DRAM for space utilizing embedded DRAMs macros in 32nm SOI CMOS
Author
Popp, Jeremy ; Ballast, John ; Rabaa, Salim ; McKay, Tony ; Braatz, Jim
Author_Institution
Boeing Res. & Technol., Seattle, WA, USA
fYear
2011
fDate
3-6 Oct. 2011
Firstpage
1
Lastpage
22
Abstract
Ultradeep submicron SOI CMOS with eDRAM enables space hardened high density memories. Significant benefit for high performance data processors. Techniques exist to mitigate SEE challenges in 32nm SOI CMOS. Reliant on intrinsic TID hardness for high density memory array. Representative data in 45nm SOI suggests should meet required leakage.
Keywords
CMOS memory circuits; DRAM chips; silicon-on-insulator; SEE challenge; SOI CMOS technology; density memory; eDRAM macro; embedded DRAM macro; high density DRAM; high density memory array; intrinsic TID hardness; performance data processor; size 32 nm; size 45 nm; space utilization; ultradeep submicron SOI CMOS technology; Aerospace electronics; CMOS technology; Ions; Logic gates; Protons; Silicon; Space vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI Conference (SOI), 2011 IEEE International
Conference_Location
Tempe, AZ
ISSN
1078-621X
Print_ISBN
978-1-61284-761-0
Electronic_ISBN
1078-621X
Type
conf
DOI
10.1109/SOI.2011.6081722
Filename
6081722
Link To Document