Process development to enable 3D IC multi-tier die bond for 20μM pitch and beyond

We demonstrate for the first time 3D multi-tier (N=4) 50μm thin die bonding for 3D IC technology using low bonding temperature and pressure for Cu TSVs bonded on Cu bumps with a cost effective structure. Die-to-die (D2D) thermal compression bonding (TCB) process with scrubbing is carefully studied in order to improve the bump height TTV and surface roughness. The bonding temperature and pressure can also be reduced significantly to below 220C and 100MPa. The standalone thin die warpage initially 15μm is reduced to 5.4μm by applying the optimized TCB process. The electrical characterizations show good daisy chain connections between each stacked chip and the resistances are very close to the theoretical values. The cross section SEM proofs good TSV alignment to Cu bump, and TSV nails deform and land nicely onto the Cu bump. Finally, we propose to move forward to die-to-wafer approach and migrate to 10μm bump pitch for advanced package application.