DocumentCode
2350495
Title
Dynamic specialisation of XC6200 FPGAs by partial evaluation
Author
McKay, N. ; Melham, Tom
Author_Institution
Dept. of Comput. Sci., Glasgow Univ.
fYear
1998
fDate
15-17 Apr 1998
Firstpage
308
Lastpage
309
Abstract
We describe preliminary results of dynamically specialising Xilinx XC6200 FPGA circuits using the partial evaluation method. This method provides a systematic way to manage the complexity of dynamic reconfiguration in the special case where a general circuit is specialised with respect to a slowly changing input. We describe how we address the verification and run-time support issues which are raised when one modifies a circuit at run-time
Keywords
computational complexity; field programmable gate arrays; partial evaluation (compilers); XC6200 FPGAs; complexity; dynamic reconfiguration; dynamic specialisation; partial evaluation; run-time support; Circuit synthesis; Costs; Electrical capacitance tomography; Electronic switching systems; Field programmable gate arrays; Identity management systems; Identity-based encryption; Microwave integrated circuits; Multiprocessor interconnection networks; Runtime;
fLanguage
English
Publisher
ieee
Conference_Titel
FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-8186-8900-5
Type
conf
DOI
10.1109/FPGA.1998.707929
Filename
707929
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