DocumentCode :
2350950
Title :
Validating software architectures for high reliability
Author :
Ehrlich, W.K. ; Chan, R. ; Donnelly, W.J. ; Park, H.H. ; Saltzman, M.B. ; Verma, P.
Author_Institution :
NSD Oper. Technol. Center, AT&T Bell Labs., Middletown, NJ, USA
fYear :
1996
fDate :
30 Oct-2 Nov 1996
Firstpage :
196
Lastpage :
206
Abstract :
In this paper, we present a generic approach for quantitatively evaluating the performance implications of a software architecture using the concept of operational profile from software reliability engineering. In our approach, the System Under Development (SUD) modes of operation are analyzed to specify a mode´s rate of arrivals of external events. The requests´ process flow (i.e., the rate of arrival of internal requests at server processes) is then derived from the software architecture. Finally, the product of the internal arrival rates and the amount of server resources to service a request is used to calculate a mode´s server resource utilization. Application of this technique to an actual AT&T telecommunications operations system, together with implications for engineering software architectures that are robust under variation in modes of operation are discussed
Keywords :
program verification; software reliability; System Under Development; arrival rates; high reliability; internal arrival rates; performance; server resource utilization; software architectures; software reliability; Computer architecture; Hardware; Mediation; Network servers; Reliability engineering; Resource management; Signal processing; Software architecture; Software reliability; Surveillance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Software Reliability Engineering, 1996. Proceedings., Seventh International Symposium on
Conference_Location :
White Plains, NY
Print_ISBN :
0-8186-7707-4
Type :
conf
DOI :
10.1109/ISSRE.1996.558800
Filename :
558800
Link To Document :
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