DocumentCode :
235097
Title :
Modeling, design, fabrication and characterization of first large 2.5D glass interposer as a superior alternative to silicon and organic interposers at 50 micron bump pitch
Author :
Sawyer, Brett ; Hao Lu ; Suzuki, Yuya ; Takagi, Yutaka ; Kobayashi, Masato ; Smet, Vanessa ; Sakai, Tadashi ; Sundaram, Venky ; Tummala, Rao
Author_Institution :
3D Syst. Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2014
fDate :
27-30 May 2014
Firstpage :
742
Lastpage :
747
Abstract :
This paper describes the first design and fabrication of a large 2.5D glass interposer with 50 μm pitch chip-level interconnections made of 6 layers of 3 μm re-distribution (RDL) wiring. Many applications including high-performance networking and cloud computing data centers require ultra-high-bandwidth of the magnitude of 512 GB/s. Silicon-based 2.5D interposers are the only approaches being pursued by the industry to meet this need, enabled by sub-micron BEOL wiring in the wafer fabs. Such interposers, however, are too expensive for most applications. Glass interposers are superior to silicon interposers due to their high dimensional stability, low loss tangent, and large panel processing ultimately leading to lower cost. This paper presents the design, fabrication and electrical characterization, leading to the first fabrication of 2.5D glass interposers with 50 μm I/O pitch with 3 μm lines. Double-sided panel processing utilizing thin, low-loss dryfilm polymer dielectrics and SAP copper plating, with differential spray etching techniques, was used to fabricate 3 um wide transmission lines on 25mm × 30mm glass interposers processed on a 300 um thick 150mm × 150mm glass panels. A six-metal layer test vehicle with two daisy chain, 10mm × 10mm test chips at 100 μm spacing, was fabricated and assembled by thermo-compression bonding of Cu microbumps and SnAg solder caps. Ultra-fine 3 μm escape routing was demonstrated on a two-metal layer test vehicle. High frequency characterization of 3 μm lines showed low loss of 0.12 dB/mm at 2 GHz.
Keywords :
copper; etching; glass; integrated circuit interconnections; lead bonding; silver alloys; tin alloys; transmission lines; BEOL wiring; Cu; I/O pitch; RDL wiring; SAP copper plating; SnAg; back-end-of-line; double-sided panel processing; dryfilm polymer dielectrics; frequency 2 GHz; large 2.5D glass interposer; pitch chip-level interconnections; redistribution layer; six-metal layer test vehicle; size 10 mm; size 100 mum; size 150 mum; size 25 mm; size 3 mum; size 30 mm; size 300 mum; size 50 micron; spray etching; thermocompression bonding; transmission lines; two-metal layer test vehicle; ultra-fine escape routing; Assembly; Fabrication; Glass; Insertion loss; Routing; Silicon; Vehicles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th
Conference_Location :
Orlando, FL
Type :
conf
DOI :
10.1109/ECTC.2014.6897367
Filename :
6897367
Link To Document :
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