Back gate bias dependent quasi-saturation in a high-voltage SOI MOSFET: 2D analysis and closed-form analytical model

Author

Liu, C.M. ; Kuo, J.B.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

fYear

1994

fDate

3-6 Oct 1994

Firstpage

25

Lastpage

26

Abstract

This paper reports a simulation study on the back gate bias dependent quasi-saturation behavior in a high-voltage SOI MOSFET. A closed-form physical back-gate bias dependent quasi-saturation model for the high-voltage SOI MOS device has been derived. Based on the analysis, with a negative back gate bias, in contrast to the zero back gate bias case, the drain current at quasi-saturation is insensitive to the drain voltage since the depth of the conduction channel in the n-region is determined mainly by the back gate bias

Keywords

power MOSFET; semiconductor device models; silicon-on-insulator; 2D analysis; HV MOSFET; Si; back gate bias dependence; closed-form analytical model; conduction channel; high-voltage SOI MOSFET; n-region; negative back gate bias; quasi-saturation behavior; simulation study; Analytical models; Application specific integrated circuits; Displays; Driver circuits; Insulation; MOS devices; MOSFET circuits; Shape; Telecommunications; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1994 Proceedings., 1994 IEEE International

Conference_Location

Nantucket, MA

Print_ISBN

0-7803-2406-4

Type

conf

DOI

10.1109/SOI.1994.514217

Filename

514217