On buried-oxide effects in SOI lateral bipolar transistors

Author

Banna, Srinivasa R. ; Chan, Philip C.H. ; Ko, Ping K.

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ., Hong Kong

fYear

1994

fDate

3-6 Oct 1994

Firstpage

29

Lastpage

30

Abstract

In this paper we present an investigation on the effects of buried oxide on Silicon-On-Insulator (SOI) lateral bipolar transistors. A buried oxide induced punchthrough effect is observed even for uniformly doped base profile and zero back-gate (substrate) bias. This punchthrough effect is attributed to the increased depletion widths at collector and emitter junctions (compared to bulk-Si) due to the buried oxide. The widely accepted depletion approximation fails to predict the depletion width in SOI p-n junctions. We propose a quasi two-dimensional model to compute the depletion width in an SOI p-n (step) junction

Keywords

bipolar transistors; buried layers; semiconductor device models; silicon-on-insulator; SOI lateral bipolar transistors; SOI p-n junctions; Si; buried-oxide effects; depletion width prediction; punchthrough effect; quasi two-dimensional model; substrate bias; uniformly doped base profile; zero back-gate bias; Back; Bipolar transistors; Computational modeling; Equations; Medical simulation; Niobium; Predictive models; Silicon on insulator technology; Surface fitting; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 1994 Proceedings., 1994 IEEE International

Conference_Location

Nantucket, MA

Print_ISBN

0-7803-2406-4

Type

conf

DOI

10.1109/SOI.1994.514219

Filename

514219