DocumentCode :
2351480
Title :
An FPGA based Adaptive Weightless Neural Network Hardware
Author :
Lorrentz, P. ; Howells, W. G J ; McDonald-Maier, K.
Author_Institution :
Dept. of Electron., Univ. of Kent, Canterbury
fYear :
2008
fDate :
22-25 June 2008
Firstpage :
220
Lastpage :
227
Abstract :
This paper explores the significant practical difficulties inherent in mapping large artificial neural structures onto digital hardware. Specifically, a class of weightless neural architecture called the enhanced probabilistic convergent network is examined due to the inherent simplicity of the control algorithms associated with the architecture. The advantages for such an approach follow from the observation that, for many situations for which an intelligent machine requires very fast, unmanned, and uninterrupted responses, a PC-based system is unsuitable especially in electronically harsh and isolated conditions, The target architecture for the design is an FPGA, the Virtex-II pro which is statically and dynamically reconfigurable, enhancing its suitability for an adaptive weightless neural networks. This hardware is tested on a benchmark of unconstrained handwritten numbers from the National Institute Of Standards And Technology (NIST), USA.
Keywords :
field programmable gate arrays; neural nets; FPGA based adaptive weightless neural network hardware; PC-based system; Virtex-II pro; artificial neural structures; intelligent machine; probabilistic convergent network; unconstrained handwritten numbers; weightless neural architecture; Adaptive systems; Artificial neural networks; Computer architecture; Field programmable gate arrays; NIST; Neural network hardware; Neural networks; Neurons; Read-write memory; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Adaptive Hardware and Systems, 2008. AHS '08. NASA/ESA Conference on
Conference_Location :
Noordwijk
Print_ISBN :
978-0-7695-3166-3
Type :
conf
DOI :
10.1109/AHS.2008.19
Filename :
4584277
Link To Document :
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