Title :
Surface quality of plasma-thinned bonded SOI wafers
Author :
Feng, T. ; Matloubian, M. ; Gardopee, G.J. ; Mathur, D.P.
Author_Institution :
Hughes Danbury Opt. Syst. Inc., CT, USA
Abstract :
The continuous decrease in the CMOS device dimension towards the deep submicrometer region has necessitated a concomitant decrease in the thickness of the gate oxide to a few hundred angstroms or less. The quality of such very thin oxides are strongly affected by the surface quality of the silicon substrates-in particular, by the microroughness and metallic surface contamination. To determine the surface quality of the recently developed plasma-thinned bonded SOI wafers, we have carried out a detailed study of the material properties of such plasma etched Si surfaces. Some of these surface properties-for example, surface concentration of metal impurities and crystalline quality of the Si surface-have already been reported, and they indicated that our plasma-thinning process does not cause any surface or subsurface damage to the top Si layer. In this paper, we present additional results on the SOI surface quality with regard to microroughness, gate-oxide breakdown, and SOI/gate oxide interface properties
Keywords :
electric breakdown; impurities; silicon-on-insulator; sputter etching; surface contamination; surface phenomena; surface topography; wafer bonding; CMOS device; SOI/gate oxide interface properties; Si; Si-SiO2; crystalline quality; gate-oxide breakdown; material properties; metal impurities; metallic surface contamination; microroughness; plasma etched Si surfaces; plasma-thinned bonded SOI wafers; surface concentration; surface quality; Etching; Impurities; Material properties; Plasma applications; Plasma devices; Plasma materials processing; Plasma properties; Silicon; Surface contamination; Wafer bonding;
Conference_Titel :
SOI Conference, 1994 Proceedings., 1994 IEEE International
Conference_Location :
Nantucket, MA
Print_ISBN :
0-7803-2406-4
DOI :
10.1109/SOI.1994.514254