Title :
Interval-valued reduced order statistical interconnect modeling
Author :
Ma, James D. ; Rutenbar, Rob A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
We show how recent advances in the handling of correlated interval representations of range uncertainty can be used to predict the impact of statistical manufacturing variations on linear interconnect. We represent correlated statistical variations in RLC parameters as sets of correlated intervals, and show how classical model order reduction methods - AWE and PRIMA - can be re-targeted to compute interval-valued, rather than scalar-valued reductions. By applying a statistical interpretation and sampling to the resulting compact interval-valued model, we can efficiently estimate the impact of variations on the original circuit. Results show the technique can predict mean delay with errors between 5-10%, for correlated RLC parameter variations up to 35%.
Keywords :
integrated circuit design; integrated circuit interconnections; integrated circuit modelling; reduced order systems; statistical analysis; AWE; PRIMA; RLC parameters; classical model order reduction methods; correlated interval representations; correlated statistical variations; interval-valued reductions; interval-valued statistical interconnect modeling; linear interconnect; range uncertainty; reduced order statistical interconnect modeling; statistical manufacturing variations; Delay estimation; Gaussian distribution; Integrated circuit interconnections; Manufacturing; RLC circuits; Sampling methods; Semiconductor device manufacture; Statistical distributions; Timing; Uncertainty;
Conference_Titel :
Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on
Print_ISBN :
0-7803-8702-3
DOI :
10.1109/ICCAD.2004.1382621