Title :
Hardware-in-Loop Simulation of a Satellite Sensor Network for Distributed Space Applications
Author :
Wu, Xiaofeng ; Vladimirova, Tanya
Author_Institution :
Dept. of Electron. Eng., Surrey Guildford Univ., Guildford
Abstract :
In this paper a hardware-in-loop simulator is presented to demonstrate the satellite sensor network concept developed at the Surrey Space Centre under the ESPACENET project. The simulator includes software that emulates satellite orbit dynamics in Low Earth Orbit and picosatellite sensor nodes. The picosatellite currently under development is based on the CubeSat platform. The main payload will be an FPGA board that implements intellectual property cores like the LEON3 processor, a media access controller for intersatellite links, image compression, encryption, etc.. The payloads of the individual satellites are connected together via IEEE 802.11 intersatellite links to demonstrate a distributed computing platform for future space missions.
Keywords :
IEEE standards; cryptography; data compression; field programmable gate arrays; satellite links; wireless LAN; wireless sensor networks; CubeSat platform; ESPACENET project; FPGA board; IEEE 802.11; LEON3 processor; Surrey Space Centre; distributed space applications; encryption; hardware-in-loop simulation; image compression; intersatellite links; low Earth orbit; media access controller; picosatellite sensor nodes; satellite orbit dynamics; satellite sensor network; Artificial satellites; Computer networks; Distributed computing; Field programmable gate arrays; Hardware; Image coding; Intellectual property; Low earth orbit satellites; Payloads; Sensor systems and applications; Distributed Computing; FPGA; Hardware-in-Loop; Inter-Satellite Link; Satellite Sensor Network;
Conference_Titel :
Adaptive Hardware and Systems, 2008. AHS '08. NASA/ESA Conference on
Conference_Location :
Noordwijk
Print_ISBN :
978-0-7695-3166-3
DOI :
10.1109/AHS.2008.55