DocumentCode
2352800
Title
Optimization of threshold voltage nonvolatile flash memory using Taguchi method
Author
Aziz, Aznita Abdul ; Hissam, N. N. Nor
Author_Institution
Fac. of Electr. Eng., Univ. Teknol. MARA, Shah Alam, Malaysia
fYear
2012
fDate
14-16 May 2012
Firstpage
1
Lastpage
5
Abstract
This paper presents the optimization of threshold voltage Flash memory by varying four control factors i.e. thickness of tunnel oxide, bottom-oxide, nitride, and top-oxide. The Flash memory structure was simulated by using Athena and Atlas module of Silvaco software. By implementation of Taguchi method, these control factors are varied each with four levels and applied in L16 orthogonal array. Signal-to-noise (S/N) ratio and Pareto ANOVA analysis are then used to determine the optimal thickness for each control factors and the main factors that have an effect upon the threshold voltage. Finally a confirmation test was conducted to verify the optimal result is as predicted. Based on S/N ratio analysis, the optimal parameter combination obtained was A4B2C3D1. From the analysis of Pareto ANOVA, bottom oxide thickness was found as the most important parameter that affecting the threshold voltage of Flash memory.
Keywords
Taguchi methods; flash memories; random-access storage; statistical analysis; Athena and Atlas module; L16 orthogonal array; Pareto ANOVA analysis; Silvaco software; Taguchi method; bottom oxide; confirmation test; nonvolatile flash memory; signal-to-noise ratio; threshold voltage; top oxide; tunnel oxide thickness; Analysis of variance; Arrays; Flash memory; Nonvolatile memory; Optimization; Software; Threshold voltage; Flash memory; taguchi method; threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer, Information and Telecommunication Systems (CITS), 2012 International Conference on
Conference_Location
Amman
Print_ISBN
978-1-4673-1549-4
Type
conf
DOI
10.1109/CITS.2012.6220368
Filename
6220368
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