Analysis of gate tunneling current in ultra-thin oxide MOSFET´s

Author

Erdogan, M.U. ; Chang, M.-C. ; Bowen, C. ; Chatterjee, A. ; Seitchik, J. ; Shichijo, H.

Author_Institution

Texas Instrum. Inc., Dallas, TX, USA

fYear

1998

fDate

22-24 June 1998

Firstpage

14

Lastpage

15

Abstract

As MOSFETs are scaled, the gate oxide thickness is becoming smaller and smaller. Gate tunneling current increases exponentially with decreasing oxide thickness. The sub-0.1 /spl mu/m transistors will require oxides thinner than 30 /spl Aring/. For such thin oxides, the tunneling current becomes significant. This current is expected to be important for the standby power and operation of circuits. Therefore, a simple analytical model for study of the effect of tunneling current would be very useful. This paper describes such a model and its applications.

Keywords

MOSFET; dielectric thin films; electric current; nanotechnology; semiconductor device models; tunnelling; 0.1 nm; 30 angstrom; MOSFET scaling; SiO/sub 2/-Si; analytical model; circuit operation; gate oxide thickness; gate tunneling current; oxide thickness; standby power; transistor oxides; tunneling current; ultra-thin oxide MOSFETs; Analytical models; Circuits; MOSFETs; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Device Research Conference Digest, 1998. 56th Annual

Conference_Location

Charlottesville, VA, USA

Print_ISBN

0-7803-4995-4

Type

conf

DOI

10.1109/DRC.1998.731101

Filename

731101