Title :
Hardware Support for Efficient Data Classification
Author :
Botwicz, Jakub ; Buciak, Piotr
Author_Institution :
Warsaw Univ. of Technol., Warsaw
Abstract :
This document describes a group of data classification problems and presents novel architecture of hardware support for data processing using hardware-software co-synthesis. The presented exemplar solution is a content-based file classifier that uses less then 1% of resources of chips currently available at the market and can provide throughput of over 2 Gbps.
Keywords :
data analysis; file organisation; content-based file classifier; data classification; data processing; hardware support; hardware-software co-synthesis; Application specific integrated circuits; Computer architecture; Computer viruses; Data processing; Data security; Electronic mail; Field programmable gate arrays; Hardware; Reconfigurable architectures; Throughput; computer viruses; data classification; data security; reconfigurable architectures;
Conference_Titel :
EUROCON, 2007. The International Conference on "Computer as a Tool"
Conference_Location :
Warsaw
Print_ISBN :
978-1-4244-0813-9
Electronic_ISBN :
978-1-4244-0813-9
DOI :
10.1109/EURCON.2007.4400607
