Title :
A new nano-scale transistor using metal/insulator/metal tunnel junction
Author :
Fujimaru, K. ; Sasajima, R. ; Matsumura, H.
Author_Institution :
Sch. of Mater. Sci., Japan Adv. Inst. of Sci. & Technol., Ishikawa, Japan
Abstract :
Since the conventional metal/oxide/semiconductor field-effect transistor (MOSFET) has physical and technological limits for sizes smaller than about 0.1 μm, a nanometer scale transistor operating by a new principle is strongly expected for realization of even higher IC density. As one of the candidates for MOSFET alternatives, the metal/insulator tunnel transistor (MITT), which consists of only metal and insulator, is proposed by our group. In the MITT, a nanometer-scale insulating region (tunnel insulator) of length L is sandwiched laterally between metal source and drain electrodes. Just above the tunnel insulator, a gate electrode is placed upon a gate insulating film (gate insulator) of thickness d/sub g/. The tunneling currents between source and drain are controlled by the gate voltage through the changing barrier width of the tunnel insulator. According to computer simulation, the MITT is expected to operate in the same way as a MOSFET. As the MITT can be inserted in the metal-signal line directly, high speed switching of the order of picoseconds and high device packaging density are expected. This paper demonstrates that the switching operation can be firstly observed experimentally by fabricating a prototype MITT.
Keywords :
MIM devices; electrodes; nanotechnology; switching; titanium; titanium compounds; tunnel transistors; 0.1 micron; IC density; MITT; MITT direct metal-signal line insertion; MOSFET; SiN/sub x/ gate insulator; Ti metal electrodes; Ti-TiO-SiN; Ti-TiO-Ti; TiO/sub x/ tunnel insulator; computer simulation; device packaging density; gate electrode; gate insulating film thickness; gate voltage; high speed switching; insulating region length; metal source/drain electrodes; metal/insulator tunnel transistor; metal/insulator/metal tunnel junction; metal/oxide/semiconductor field-effect transistor; nanometer scale transistor; nanoscale transistor; physical limits; prototype MITT fabrication; switching operation; technological limits; tunnel insulator; tunnel insulator barrier width; tunneling currents; Computer simulation; Electrodes; FETs; Insulation; MOSFET circuits; Metal-insulator structures; Packaging; Prototypes; Tunneling; Voltage control;
Conference_Titel :
Device Research Conference Digest, 1998. 56th Annual
Conference_Location :
Charlottesville, VA, USA
Print_ISBN :
0-7803-4995-4
DOI :
10.1109/DRC.1998.731114