Title :
Silicon single electron switch with an electrically formed quantum dot
Author :
Kim, D.H. ; Lee, J.D. ; Park, B.G. ; Lee, H.G.
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
Abstract :
A single electron switch based on the Coulomb blockade was recently proposed and experimentally demonstrated, but the various approaches to operate a single electron switch at room temperature tended to depend on somewhat fortuitous phenomena such as polysilicon graining or e-beam irregularity, resulting in relatively poor controllability and reproducibility. On the other hand, SETs (single electron transistors) with a controllable quantum dot defined by lithography have been operating more or less in the low temperature regime (Matsuoka, 1994). SETs based on an electrically formed quantum dot have the potential to be a controllable and reproducible room temperature device, an appropriate method to shrink the size of the quantum dot can be devised. In this paper, we propose a simple fabrication scheme which can dramatically reduce the size of the electrically formed quantum dot. The device structure is based on a dual-gate MOSFET structure. The major innovation is the use of a polysilicon sidewall has been used as an upper gate electrode, which made it possible to form a quantum dot smaller than the limit of e-beam lithography and solve the problem of the proximity effect. Upper gate space smaller than 50 nm can be achieved from a 0.35 μm nitride groove by the formation of polysilicon sidewalls. 3D simulation shows that the electrical quantum dot in a narrow inversion layer was shrunken to be effectively smaller than the patterned size due the field effect of the upper gates.
Keywords :
Coulomb blockade; MOSFET; electricity; electron beam lithography; elemental semiconductors; field effect transistor switches; proximity effect (lithography); semiconductor quantum dots; silicon; single electron transistors; 0.35 micron; 3D simulation; 50 nm; Coulomb blockade; SETs; Si; Si/sub 3/N/sub 4/-Si; SiO/sub 2/-Si; controllable quantum dot; controllable room temperature device; dual-gate MOSFET structure; e-beam irregularity; e-beam lithography; electrical quantum dot; electrically formed quantum dot; fabrication scheme; lithography; low temperature regime; narrow inversion layer; nitride groove; patterned size; polysilicon graining; polysilicon sidewall upper gate electrode; polysilicon sidewalls; proximity effect; quantum dot size; reproducible room temperature device; silicon single electron switch; single electron switch; single electron transistors; upper gate field effect; upper gate space; Controllability; Lithography; Quantum dots; Reproducibility of results; Silicon; Single electron transistors; Size control; Switches; Temperature control; Temperature dependence;
Conference_Titel :
Device Research Conference Digest, 1998. 56th Annual
Conference_Location :
Charlottesville, VA, USA
Print_ISBN :
0-7803-4995-4
DOI :
10.1109/DRC.1998.731116