Achieving language independence with Paragon

We describe Paragon, a novel modeling tool that promotes the creation of HDL-based models at a more abstract, language-independent level. This modeling environment encapsulates the semantic elements necessary to create models at various hierarchical levels from mixed-signal and mixed-technology behavioral models down to semiconductor device models. Paragon is designed to support the generation of multiple hardware description languages including VHDL-AMS, MAST, and Verilog-A(MS) as well as C and C++-based codes. We focus on the facets of Paragon that enable language independence.