DocumentCode :
2353697
Title :
A low-cost metal ball grid array for flip chip die
Author :
Wilson, James W. ; Moore, Scott P. ; Laine, Eric H.
Author_Institution :
IBM Corp., Endicott, NY, USA
fYear :
1995
fDate :
21-24 May 1995
Firstpage :
42
Lastpage :
45
Abstract :
A low cost ball grid array package has been developed for use with flip chip die. The structural “back bone” of this chip carrier is a metal plate which serves as a built-in heat spreader and a floating ground plane as well as the principal structural member of the package. Thin film circuitry is employed to make the necessary connections between the die and the solder balls. The fine line circuitization enables escape of many I/O from the flip chip die and thus a high I/O package with only a single layer of circuitry. The circuit lines are separated from the metal plate by means of a thin polymer dielectric layer. The die is attached to the carrier with a conventional high temperature C4 attach process. The ball grid array is on a 1.27 mm pitch. The metal plate that serves as the structural member of this package provides a number of benefits. The coefficient of thermal expansion (CTE) of the metal plate is very close to the CTE of the circuit card. The size of the package is not limited, therefore, in order to prevent fatigue and fracture of solder balls. The metal plate is separated from the circuitry by only a thin layer of dielectric material. The plate thus serves as a very effective floating ground plane and thereby provides improved electrical performance. The plate also serves as an effective heat spreader, again because of the thin dielectric layer separating the metal plate from the circuitry, the die and the solder balls. If added thermal performance is desired, a heat sink is easily attached to the backside of the metal plate. The thin film circuitry employed in this package also provides a number of benefits. The die and the solder balls are connected by a single layer of circuitry. Since electrical vias are not required, low cost processing is possible. Circuitization of the thin film metal can produce extremely fine lines and spaces; more than 700 I/O can be handled in a single layer
Keywords :
flip-chip devices; packaging; 1.27 mm; ball grid array; chip carrier; coefficient of thermal expansion; fine line circuitization; flip chip die; floating ground plane; heat sink; heat spreader; high temperature C4 attach; low cost processing; metal plate; package; polymer dielectric layer; solder ball; thin film circuitry; Costs; Dielectric materials; Dielectric thin films; Electronics packaging; Fatigue; Flip chip; Polymers; Temperature; Thermal expansion; Thin film circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference, 1995. Proceedings., 45th
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-2736-5
Type :
conf
DOI :
10.1109/ECTC.1995.514359
Filename :
514359
Link To Document :
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