Ion implantation issues in microelectronic device manufacturing

Ion implantation is one of the most common steps in the manufacture of integrated circuits. In a typical CMOS process, it is used 15 to 18 times for selective doping. The major advantages of ion implantation are the masking flexibility, throughput, extendibility to larger wafers, and ability to form impurity profiles that are not possible with simple diffusion. Profiles such as single and multiple retrograde wells, buried layers, and flexible “drain engineering” can be produced to construct high-performance devices and novel three-dimensional structures for memory, logic, and analog applications. Ion implantation systems are, however, very complex and can create problems related to non uniformities and defects, limiting product yield. These problems include heavy metal contamination and particulates, species cross-contamination, photo resist masking defects, dose monitoring inaccuracies, wafer charging, and crystal damage. In this paper, we review the current status of ion implantation issues from the perspective of device yield and cost. We discuss methods that are implemented to reduce or eliminate problems and present results obtained in memory and logic applications