DocumentCode :
2354317
Title :
Study of arsenic out-diffusion for buried plate formation in trench capacitors
Author :
Economikos, L. ; Murthy, C.S. ; Young, R.W.
Author_Institution :
Semicond. Res. & Dev. Center, IBM Corp., East Fishkill, NY, USA
fYear :
1998
fDate :
19-21 Oct 1998
Firstpage :
423
Lastpage :
432
Abstract :
We undertook a combined study of experiments and calibrated simulations to examine the arsenic diffusion from a solid source into Si for simulation of the buried plate (BP) of a trench capacitor. Arsenosilicate glass (ASG) deposited conformally in a Si deep trench has been used as a source to diffuse As into p-type Si to form a BP. Out-diffusion of As from ASG is studied for various two-step anneals consisting of an inert anneal followed by an oxidizing anneal. Effects of dry versus wet oxidation are contrasted. It was found that the junction depth decreases linearly with the oxide thickness grown from the second step of the ASG drive-in process. Arsenic surface concentration increases as more oxide is grown during the oxidation step, as long as the oxide thickness is less than the junction depth created by the anneal step of the ASG drive-in process. Effects of deposited As concentration and drive-in conditions on the trench capacitance are also investigated
Keywords :
annealing; arsenic; buried layers; capacitance; capacitors; circuit simulation; diffusion; integrated circuit modelling; integrated circuit testing; oxidation; ASG drive-in process; As diffusion source; As surface concentration; Si; Si deep trench; Si:As; SiO2-Si; anneal step; arsenic out-diffusion; arsenosilicate glass; buried plate formation; calibrated simulations; conformal ASG deposition; deposited As concentration effects; drive-in conditions; dry oxidation; inert anneal; junction depth; oxidation step; oxide growth; oxide thickness; oxidizing anneal; p-type Si; solid source; solid source arsenic diffusion; trench capacitance; trench capacitor buried plate; trench capacitors; two-step anneals; wet oxidation; Annealing; Capacitance; Capacitors; Chemical engineering; Chemical vapor deposition; Educational institutions; Glass; Oxidation; Physics; Semiconductor process modeling; Silicon; Solid modeling; Solid state circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT
Conference_Location :
Austin, TX
ISSN :
1089-8190
Print_ISBN :
0-7803-4523-1
Type :
conf
DOI :
10.1109/IEMT.1998.731168
Filename :
731168
Link To Document :
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