DocumentCode :
2354389
Title :
Performance enhanced copper core BGA
Author :
Wu, Paul ; Chen, Kevin ; Ho, L.H. ; Nachnani, Manoj
fYear :
1998
fDate :
19-21 Oct 1998
Firstpage :
450
Lastpage :
454
Abstract :
The copper core BGA (C2BGA) is a copper core, face up multilayer BGA package. It is designed for high performance, high density applications. Very low inductance and low impedance solid copper vias are used to connect the traces on either side of the copper core. These solid copper vias are defined using a proprietary microisland via (MIVia) technology. A brief description of the microisland via manufacturing process is also discussed. The ease with which the copper core can be grounded using these low impedance solid copper vias allows the designers to define a multitude of stripline and microstrip line structures with well defined and well controlled impedances. This paper discusses some of the electrical performance results of microisland via and compares it with plated through via. The C2BGA thermal performance is also improved over conventional face-up packages due to the use of the copper core and is comparable to the thermally enhanced cavity down package. Thermal modeling and measurement data are presented and some guidelines to enhance thermal performance are discussed. Finally, reliability data for the microisland via stack-up in the C2BGA is presented
Keywords :
ball grid arrays; copper; electric impedance; integrated circuit interconnections; integrated circuit measurement; integrated circuit packaging; integrated circuit reliability; microstrip circuits; microstrip lines; thermal analysis; thermal management (packaging); C2BGA package; C2BGA thermal performance; Cu; MIVia technology; copper core; copper core BGA; copper core face-up multilayer BGA package; copper core grounding; electrical performance; face-up packages; high density applications; impedance; inductance; low impedance solid copper vias; measurement data; microisland via; microisland via stack-up; microisland via technology; microstrip line structures; performance enhanced copper core BGA; plated through via; reliability data; solid copper vias; stripline structures; thermal modeling; thermal performance; thermally enhanced cavity down package; trace interconnects; Copper; Guidelines; Impedance; Inductance; Manufacturing processes; Microstrip; Nonhomogeneous media; Packaging; Solids; Stripline;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1998. Twenty-Third IEEE/CPMT
Conference_Location :
Austin, TX
ISSN :
1089-8190
Print_ISBN :
0-7803-4523-1
Type :
conf
DOI :
10.1109/IEMT.1998.731171
Filename :
731171
Link To Document :
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