Structural computer-aided design of current-mode CMOS logic circuits

Author

Onneweer, Siep ; Kerkhoff, Hans ; Butler, Jon

Author_Institution

Twente Univ., Enschede, Netherlands

fYear

1988

fDate

0-0 1988

Firstpage

21

Lastpage

30

Abstract

A set of CAD (computer-aided design) tools for the synthesis and layout generation of multiple-valued current-mode CMOS logic (CMCL) circuits is described. The synthesis method is based on the cost-table method. The general circuit structure, the cost-table functions, and the decomposition procedure used in the synthesis program are explained. The program is based on a logically complete set of basic elements for CMCL circuits. After circuit synthesis, the actual layout is generated using standard-cell IC design tools.<>

Keywords

CMOS integrated circuits; logic CAD; logic circuits; many-valued logics; CAD tools; cost-table method; current-mode CMOS logic circuits; decomposition procedure; layout generation; multiple-value logic; standard-cell IC design tools; structural computer aided design; CMOS integrated circuits; CMOS logic circuits; Circuit synthesis; Cost function; Design automation; Design methodology; Logic circuits; Logic design; Mirrors; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Multiple-Valued Logic, 1988., Proceedings of the Eighteenth International Symposium on

Conference_Location

Palma de Mallorca, Spain

Print_ISBN

0-8186-0859-5

Type

conf

DOI

10.1109/ISMVL.1988.5144

Filename

5144