DocumentCode
2355117
Title
Laminate package trends for high-speed system interconnects
Author
Cases, M. ; de Araujo, D.N. ; Pham, N. ; Blackshear, E.
Author_Institution
IBM Corp., Austin, TX, USA
fYear
2003
fDate
27-29 Oct. 2003
Firstpage
147
Lastpage
150
Abstract
As the performance of processors and their associated supporting components increases with improvements in process technologies, the demand on packaging solutions is also increasing. High-speed devices require complex thermal, power delivery and signal integrity solutions at relatively low cost to be competitive in the present marketplace. This paper presents the rapidly evolving laminate package trends and advances for high-speed system-level interconnects. The importance of properly designing the substrate for high-speed signaling is discussed including identification of key parameters and design tradeoffs.
Keywords
chip-on-board packaging; flip-chip devices; interconnections; laminates; design tradeoffs; flip chip laminate; high-speed signaling; high-speed system interconnects; laminate package trends; organic laminate; packaging solutions; substrate design; Costs; Frequency; Integrated circuit interconnections; Laminates; Power system interconnection; Power system reliability; Semiconductor device noise; Semiconductor device packaging; Signal design; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2003
Conference_Location
Princeton, NJ, USA
Print_ISBN
0-7803-8128-9
Type
conf
DOI
10.1109/EPEP.2003.1250019
Filename
1250019
Link To Document