• DocumentCode
    2355183
  • Title

    Speculative lock elision: enabling highly concurrent multithreaded execution

  • Author

    Rajwar, Ravi ; Goodman, James R.

  • Author_Institution
    Dept. of Comput. Sci., Wisconsin Univ., Madison, WI, USA
  • fYear
    2001
  • fDate
    1-5 Dec. 2001
  • Firstpage
    294
  • Lastpage
    305
  • Abstract
    Serialization of threads due to critical sections is a fundamental bottleneck to achieving high performance in multithreaded programs. Dynamically, such serialization may be unnecessary because these critical sections could have safely executed concurrently without locks. Current processors cannot fully exploit such parallelism because they do not have mechanisms to dynamically detect such false inter-thread dependences. We propose Speculative Lock Elision (SLE), a novel micro-architectural technique to remove dynamically unnecessary lock-induced serialization and enable highly concurrent multithreaded execution. The key insight is that locks do not always have to be acquired for a correct execution. Synchronization instructions are predicted as being unnecessary and elided. This allows multiple threads to concurrently execute critical sections protected by the same lock. Misspeculation due to inter-thread data conflicts is detected using existing cache mechanisms and rollback is used for recovery. Successful speculative elision is validated and committed without acquiring the lock. SLE can be implemented entirely in microarchitecture without instruction set support and without system-level modifications, is transparent to programmers, and requires only trivial additional hardware support. SLE can provide programmers a fast path to writing correct high-performance multithreaded programs.
  • Keywords
    multi-threading; synchronisation; high-performance multithreaded programs; highly concurrent multithreaded execution; inter-thread dependences; lock-induced serialization; micro-architectural technique; multiple threads; multithreaded programs; speculative lock elision; Data structures; Hardware; High performance computing; Microarchitecture; Parallel processing; Programming profession; Protection; Reactive power; Writing; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 2001. MICRO-34. Proceedings. 34th ACM/IEEE International Symposium on
  • ISSN
    1072-4451
  • Print_ISBN
    0-7965-1369-7
  • Type

    conf

  • DOI
    10.1109/MICRO.2001.991127
  • Filename
    991127