DocumentCode :
235668
Title :
Self-patterning, pre-applied underfilling technology for stack-die packaging
Author :
Chia-Chi Tuan ; Ziyin Lin ; Yan Liu ; Kyoung-sik Moon ; Ching-Ping Wong
Author_Institution :
Sch. of Mater. Sci. & Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2014
fDate :
27-30 May 2014
Firstpage :
2231
Lastpage :
2235
Abstract :
Die stacking is one of the next-generation 3D IC packaging methods, but its stringent material requirements are unlikely to be met by traditional underfills. Moreover, filler trapping is becoming an increasingly serious issue in no-flow and wafer-level underfills. In this report, we demonstrate a novel underfilling technology for the reduction of filler trapping in fine-pitch interconnects. In our method, we fabricate superhydrophobic bond pads, and control the flow of the underfill material by the surface energy difference between the bond pads and the Si3N4 substrate. The superhydrophobic bond pads are shown to have no effect on the bonding of soldering materials to the pads.
Keywords :
hydrophobicity; integrated circuit interconnections; integrated circuit packaging; three-dimensional integrated circuits; wetting; 3D integrated circuit packaging method; Si3N4; filler trapping reduction; fine pitch interconnect; preapplied underfilling technology; self-patterning technology; soldering material bonding; stack die packaging; superhydrophobic bond pad; surface energy difference; underfill material flow; Rough surfaces; Substrates; Surface morphology; Surface roughness; Surface treatment; Vehicles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th
Conference_Location :
Orlando, FL
Type :
conf
DOI :
10.1109/ECTC.2014.6897613
Filename :
6897613
Link To Document :
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