• DocumentCode
    2356777
  • Title

    A monolithic spectral BIST technique for control or test of analog or mixed-signal circuits

  • Author

    Emmert, John M. ; Cheatham, Jason A. ; Jagannathan, Badhri ; Umarani, Sandeep

  • Author_Institution
    Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
  • fYear
    2003
  • fDate
    3-5 Nov. 2003
  • Firstpage
    303
  • Lastpage
    310
  • Abstract
    Intelligent radio frequency (RF) front ends make use of MMIC and MEMS devices to provide a limited range of programmability to what have historically been fixed resistive, capacitive, and inductive impedance matching networks. Many BIST methods for mixed-signal systems can also be used to monitor and provide feedback for the control of such RF systems. For example, spectral techniques can be used to analyze and determine the center frequency of a bandpass filter. Information relative to the center frequency can then be fed back into the system, and adjustments can be made to fine tune the filter. In this paper, we outline our spectral based, mixed-signal approach for monitoring the health of analog and RF components in mixed-signal systems on-chip. In our approach we use well known DSP techniques based an the FFT for on-chip signal generation and analysis. We reduce required hardware by using the same functional block to analyze analog output signals that we use to generate m tone stimulus signals. By providing an on-chip functional test capability, we also reduce the test time required on expensive ATE. Our techniques have been prototyped and demonstrated on a Xilinx Virtex-II FPGA using an off-chip ADC and DAC, and we are currently implementing the technique on an ASIC using a 0.13 μm process with target execution speeds of 2-16 GHz.
  • Keywords
    MMIC; analogue integrated circuits; analogue-digital conversion; application specific integrated circuits; automatic test equipment; band-pass filters; built-in self test; circuit feedback; circuit tuning; digital-analogue conversion; field programmable gate arrays; impedance matching; mixed analogue-digital integrated circuits; programmable circuits; system-on-chip; 0.13 micron; 2 to 16 GHz; ADC; ASIC; ATE; DAC; FPGA; MEMS; MMIC; RF components; analog components; analog mixed-signal circuits; bandpass filter center frequency; capacitive impedance matching networks; circuit programmability; feedback control; filter fine tuning; inductive impedance matching networks; intelligent RF front ends; monolithic spectral BIST; on-chip functional test; resistive impedance matching networks; systems on-chip; tone stimulus signals; Band pass filters; Built-in self-test; Circuit testing; Intelligent networks; MMICs; Microelectromechanical devices; Monitoring; Radio frequency; Signal analysis; Signal generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 2003. Proceedings. 18th IEEE International Symposium on
  • ISSN
    1550-5774
  • Print_ISBN
    0-7695-2042-1
  • Type

    conf

  • DOI
    10.1109/DFTVS.2003.1250125
  • Filename
    1250125