DocumentCode :
2356824
Title :
A simple FPGA-based conjugate search motion estimator
Author :
Kumar, Sanjay ; Haniyur, Vikram ; Choo, Chang Y. ; Chen, Ray
Author_Institution :
Dept. of Electr. Eng., San Jose State Univ., CA, USA
fYear :
1994
fDate :
5-8 Dec 1994
Firstpage :
109
Lastpage :
114
Abstract :
Conjugate search is an efficient motion estimation algorithm based on block matching for video compression. This paper presents our ongoing work to develop the prototype of the conjugate search motion estimation hardware. So far, we have implemented a simplified version of the conjugate search motion estimation algorithm using field programmable gate arrays. Simulation results indicate that the performance of this hardware is comparable to the one based on full-search algorithm, while hardware is much simpler
Keywords :
data compression; field programmable gate arrays; motion estimation; video coding; FPGA-based algorithm; block matching; conjugate search motion estimator; motion estimation algorithm; video compression; Algorithm design and analysis; Circuit simulation; Computational efficiency; Field programmable gate arrays; Hardware; Joining processes; Motion estimation; Prototypes; US Department of Transportation; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2440-4
Type :
conf
DOI :
10.1109/APCCAS.1994.514533
Filename :
514533
Link To Document :
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