Title :
A study on a high blocking voltage UMOS-FET with a double gate structure
Author :
Baba, Y. ; Matsuda, N. ; Yanagiya, S. ; Hiraki, S. ; Yasuda, S.
Author_Institution :
Toshiba Corporation Japan
Keywords :
Breakdown voltage; Double-gate FETs; Electric breakdown; Electric resistance; Fabrication; Impurities; Threshold voltage;
Conference_Titel :
Power Semiconductor Devices and ICs, 1992. ISPSD '92. Proceedings of the 4th International Symposium on
DOI :
10.1109/ISPSD.1992.991291
