Title :
Redundancy, repair, and test features of a 90nm embedded SRAM generator
Author :
Aitken, Rob ; Dogra, Neeraj ; Gandhi, Dhrumil ; Becker, Scott
Author_Institution :
Artisan Components, Sunnyvale, CA, USA
Abstract :
Today´s system on chip (SoC) designs can use hundreds of embedded memories. Most of these are created by automated generators, which must produce a wide variety of configurations while retaining essential capabilities in area, performance, power and testability. Redundancy, repair, and test issues in the context of memory generators are more complex than they are in the context of individual embedded memories, or even internally developed memories.
Keywords :
SRAM chips; design for testability; logic design; logic testing; redundancy; system-on-chip; 90 nm; DFT; SRAM generator test features; SoC; embedded SRAM; embedded memories; redundancy; repair; system on chip; Automatic testing; Built-in self-test; Circuit testing; Distributed power generation; Foundries; Graphical user interfaces; Power generation; Random access memory; Redundancy; Timing;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2003. Proceedings. 18th IEEE International Symposium on
Print_ISBN :
0-7695-2042-1
DOI :
10.1109/DFTVS.2003.1250145
