• DocumentCode
    2357079
  • Title

    The radix-2k Viterbi decoding with transpose path metric processor

  • Author

    Lee, Wen-Ta ; Chen, Thou-Ho ; Chen, Liang-Gee

  • Author_Institution
    Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • fYear
    1994
  • fDate
    5-8 Dec 1994
  • Firstpage
    194
  • Lastpage
    199
  • Abstract
    In this paper, we present a radix-2k Viterbi decoding with Transpose Path Metric (TPM) processor. The TPM processor can provide a permutation function for state rearrangement with simple local interconnection. For interconnection realization, the routing complexity is less than that of the delay-commutator reported previously. In addition, a higher memory length Viterbi processor can be constructed with lower radix-2k modules. With features of modulation and cell regularity, the radix-2k Viterbi decoding with TPM processor is very suitable for VLSI implementation
  • Keywords
    Viterbi decoding; VLSI; local interconnection; memory length; permutation function; radix-2k Viterbi decoding; routing complexity; state rearrangement; transpose path metric processor; Computer architecture; Convolutional codes; Costs; Decoding; Hardware; Routing; Shift registers; State estimation; Very large scale integration; Viterbi algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    0-7803-2440-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.1994.514548
  • Filename
    514548
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2357079