Title : 
Heterogeneous redundancy for fault and defect tolerance with complexity independent area overhead
         
        
            Author : 
Kumar, Vinu Vijay ; Lach, John
         
        
            Author_Institution : 
Dept. of Electr. & Comput. Eng., Virginia Univ., Charlottesville, VA, USA
         
        
        
        
        
        
            Abstract : 
The continuous increase in digital system complexity is raising the area cost of redundancy-based fault and defect tolerance. This paper introduces a technique for heterogeneous redundancy in control path and datapath circuitry that provides high reliability with area overhead that is independent of system complexity. Small amounts of circuit-specific reconfigurable logic are finely integrated with fixed-logic circuitry to provide fine-grained heterogeneous fault and defect tolerance. Results reveal that the technique is effective for a variety of circuits, providing high reliability with a constant magnitude area overhead that is independent of system complexity.
         
        
            Keywords : 
VLSI; fault tolerance; integrated circuit reliability; logic design; logic testing; reconfigurable architectures; redundancy; VLSI circuits; circuit-specific reconfigurable logic; complexity independent area overhead; control path circuitry; datapath circuitry; defect tolerance; fault tolerance; heterogeneous redundancy; offline embedded testing; online embedded testing; reliability; system complexity independent area overhead; Automatic testing; Circuit faults; Circuit testing; Electrical fault detection; Fault tolerance; Hardware; Logic circuits; Logic testing; Reconfigurable logic; Redundancy;
         
        
        
        
            Conference_Titel : 
Defect and Fault Tolerance in VLSI Systems, 2003. Proceedings. 18th IEEE International Symposium on
         
        
        
            Print_ISBN : 
0-7695-2042-1
         
        
        
            DOI : 
10.1109/DFTVS.2003.1250157