DocumentCode :
2357532
Title :
Surface planarization of Cu/Sn micro-bump and its application in fine pitch Cu/Sn solid state diffusion bonding
Author :
Zhang, W. ; Limaye, P. ; Agarwal, R. ; Soussan, P.
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2010
fDate :
8-10 Dec. 2010
Firstpage :
143
Lastpage :
146
Abstract :
Low temperature stacking of dies for 3D integration has been gaining interest due to the thermal sensitivity of some advanced node devices such as DRAM. Sn-based solder joint is considered as a promising approach for making die to die interconnections due to its low bonding temperature and high yield. Previously the Cu/Sn solid state diffusion bonding at 150 °C was reported, during which the bonding pressure is typically of 50 MPa. The remaining challenge for fine pitch Cu/Sn solid state diffusion bonding is how to enable good bonding for micro-bump with high topography. The effect of improving the contact between bumps was studied by applying a fly-cutting process to trim Cu/Sn bump surface. First, 2 kinds of fly-cutting processes, named fly-cutting first and seed etch first, are studied. Then different combinations such as fly-cutted Cu to non-fly-cutted Sn and fly-cutted Cu to fly-cutted Sn are compared. It is found that Cu and Sn micro-bumps with high topography become quite flat and smooth after fly-cutting, which ensure a smooth bonding interface. Moreover, ~80% yielding devices are achieved on 40/15 μm pitch/spacing peripheral array dies at 150°C with NUF serving as an intermediate cleaning agent as well as permanent underfill. In general, fly-cutting is an attractive option in enabling a good solid state diffusion bonding for micro-bump with high surface non-uniformity.
Keywords :
DRAM chips; bonding processes; copper alloys; fine-pitch technology; integrated circuit interconnections; microassembling; planarisation; solders; stacking; tin alloys; 3D integration; Cu-Sn; Cu/Sn microbump; DRAM; bonding pressure; die interconnections; fine pitch Cu/Sn; fly cutting; intermediate cleaning agent; low temperature stacking; permanent underfill; pressure 50 MPa; smooth bonding interface; solder joint; solid state diffusion bonding; surface planarization; temperature 150 degC; thermal sensitivity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2010 12th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-8560-4
Electronic_ISBN :
978-1-4244-8561-1
Type :
conf
DOI :
10.1109/EPTC.2010.5702622
Filename :
5702622
Link To Document :
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