DocumentCode :
2357607
Title :
Embedded Si-Heat Spreader in LFBGA package
Author :
Cheng, Poon Soo ; Karim, Abdul ; Ng, Christine
Author_Institution :
Infineon Technol. Asia Pacific Pte. Ltd., Singapore, Singapore
fYear :
2010
fDate :
8-10 Dec. 2010
Firstpage :
163
Lastpage :
167
Abstract :
With the increase in heat dissipation from microelectronic devices and the reduction in overall form factors, thermal management becomes a more and more important element of electronic product design. To provide electronic packages with sufficient cooling, the thermal resistance of a package can be reduced by attaching heat spreader into the IC package. This is usually seen on bigger size packages such as PBGA using drop-in or cavity down method where space is not a constraint. However, for a LFBGA package which is near-chip-scale in size, the chip is occupying most of the area of the package and hence placing a typical heat spreader is a big challenge. Especially if the package assembly uses substrate format with high density panel matrix utilizing panel molding, process issues such as mold bleed on the surface of the heat-spreader, placement accuracy of heat spreader either individual or strip form is some known challenges. Although several establish solutions are available in the market to address the assembly issues but they mostly required additional non-standard process steps, jigs, fixtures and new machines typically at EOL which results in high unit cost. This paper discusses the development of a simple method to embed a Si-Heat Spreader (Si-HS) into a typical LFBGA package without compromising the die size or the package size. Unlike the Drop-in heat spreader or Cavity down thermally enhanced BGAs with bottom heat slug, this method of stacking the Si-HS is able to accommodate changes in the die size leaving more room for wire bonding. Attached before molding, it eliminates the need for additional investment for equipment and tooling. Compared to other configuration with exposed heat spreader, this embedded heat-spreader structure enable the use of standard EOL infrastructure such as molding, laser mark and singulation. However, balancing of Si-HS dimension w.r.t. thermal performance & mold process-ability will need to be addressed. Challenges at FOL an- - d EOL process and brief analytic results after assembly will be discussed in full paper.
Keywords :
ball grid arrays; cooling; elemental semiconductors; integrated circuit packaging; lead bonding; moulding; silicon; thermal management (packaging); LFBGA package; PBGA; Si; electronic packages; electronic product design; embedded Si-heat spreader; heat dissipation; high density panel matrix; integrated circuit package; microelectronic devices; mold process ability; package assembly; panel molding; thermal management; thermal resistance; wire bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2010 12th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-8560-4
Electronic_ISBN :
978-1-4244-8561-1
Type :
conf
DOI :
10.1109/EPTC.2010.5702626
Filename :
5702626
Link To Document :
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