Title :
Failure analysis for metal bridge defect in logic area of mixed-signal IC
Author :
Diwei Fan ; Wang, W.
Author_Institution :
Product Anal. Eng. of Quality Dept., Freescale Semicond. (China) Ltd., Tianjin, China
fDate :
June 30 2014-July 4 2014
Abstract :
In mixed-signal ICs the die surface is divided between the analog circuit and the digital circuit often referred to as the logic area. Compare with the analog area, the logic area has more complex signals. The metal lines are narrower and closer together. These factors make it very hard to analyze defects such as metal bridges in the logic area. Firstly, the complicated waveform of signals and circuit loops in logic area make the schematic analysis harder. We cannot find the failed signal only through the comparison between reference unit and failed unit. The reason is that in the complicated circuit loop, one signal failure can cause many other signals in the circuit loop to fail. Secondly, if the failed signal is caused by metal bridge defect, since there are many metal lines close to the failed signal metal bridges to several of the metal lines could be the cause of failure. In this paper, we show how many FA techniques such as emission microscopy, microprobe, function, OBIRCH, FIB etc need to be used can be used to find a metal bridge defect causing a failure in the logic area.
Keywords :
failure analysis; integrated circuit reliability; logic circuits; mixed analogue-digital integrated circuits; analog circuit; circuit loop; die surface; digital circuit; failure analysis; logic area; metal bridge defect; mixed signal IC; Bridge circuits; Failure analysis; Integrated circuits; Inverters; Logic circuits; Metals; Photonics; Failure analysis; Logic circuit area; Mixed-signal IC; metal bridge defect;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2014 IEEE 21st International Symposium on the
Conference_Location :
Marina Bay Sands
Print_ISBN :
978-1-4799-3931-2
DOI :
10.1109/IPFA.2014.6898124