DocumentCode :
235815
Title :
A study of isolation test on FullPAK device
Author :
Gan, S.Y. ; Alias, Lokman ; Ng, W.Y.
Author_Institution :
Infineon Technol. (M) Sdn. Bhd., Batu Berendam, Malaysia
fYear :
2014
fDate :
June 30 2014-July 4 2014
Firstpage :
160
Lastpage :
164
Abstract :
The isolation test condition and the root cause of isolation failures are always the main concerns of the manufacturers and customers. Several of studies have been carried out to evaluate the optimize settings so that the device meets the required quality standard. The company is benefited from the isolation test activity which is also known as Dielectric Withstand Voltage test or Isolation Test, to enable the screening of the mold compound rejects electrically. The test is used to verify the insulation of the mold compound whether it is sufficient enough or not to protect the user from electric shock by measuring and checking the mold compound compactness so that any reject which lead to mold voids can be filtered out. `Mold voids´ is actually referring to the air pockets trap within the mold compound itself which is generated from the incompactness of mold process. This is where failure analysis comes in to reveal the underlying root cause failure of the package insulation. Different kinds of method have been used here, for example, X-ray, SAM (Scanning Acoustic Microscopy), SEM (Scanning Electron Microscopy), electrical test verifications, cross section and etcetera.
Keywords :
dielectric devices; failure analysis; insulating materials; isolation technology; FullPAK device; air pockets trap; dielectric withstand voltage test; electric shock; electrical test verifications; failure analysis; isolation failures; isolation test; mold compound rejects; mold voids; package insulation; scanning acoustic microscopy; scanning electron microscopy; Cavity resonators; Compounds; Failure analysis; Inspection; Insulation; Scanning electron microscopy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2014 IEEE 21st International Symposium on the
Conference_Location :
Marina Bay Sands
ISSN :
1946-1542
Print_ISBN :
978-1-4799-3931-2
Type :
conf
DOI :
10.1109/IPFA.2014.6898148
Filename :
6898148
Link To Document :
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