Title :
Design of inverse DCT unit and motion compensator for MPEG2 HDTV decoding
Author :
Onoye, Takao ; Morimoto, Yasuo ; Masaki, Toshihiro ; Shirakawa, Isao
Author_Institution :
Dept. of Inf. Syst. Eng., Osaka Univ., Japan
Abstract :
An MPEG2 video decoder core is implemented, which consists of an inverse discrete cosine transform (IDCT) unit and a motion compensator. By means of butterfly computation, multi-bit extension of distributed arithmetic, and improvement of critical paths, the IDCT unit achieves a high throughput, and the motion compensator calculates half-pel image dynamically so as to cover several types of picture prediction modes employed by MPEG2. The decoder core occupies 27 mm2 in a 0.6-μm triple-metal CMOS technology, processes a macroblock (16×16 pels) within 2.5 μs, and therefore is capable of decoding HDTV (1920×1152 pels) resolution images in real time
Keywords :
CMOS digital integrated circuits; decoding; discrete cosine transforms; high definition television; motion compensation; real-time systems; 0.6 micron; 1152 pixel; 1920 pixel; 2.5 mus; 2211840 pixel; HDTV decoding; IDCT unit; MPEG2; butterfly computation; critical paths; half-pel image; inverse DCT unit; motion compensator; multi-bit extension; picture prediction modes; real time decoding; triple-metal CMOS technology; video decoder core; CMOS technology; Decoding; Discrete cosine transforms; HDTV; Image coding; Image storage; Notice of Violation; Satellite broadcasting; TV broadcasting; Transform coding;
Conference_Titel :
Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2440-4
DOI :
10.1109/APCCAS.1994.514621
