Title :
Process development of 17.5µm gold wire bonding on C65 low-k devices with probe marks
Author :
Poh, Christine Ng Bee ; Ving, Tee Heng ; Tham Veng Leong ; Chye, Eric Neo Cheng
Author_Institution :
Infineon Technol. Asia Pacific Pte. Ltd., Singapore, Singapore
Abstract :
Today´s semiconductor industry continues to deliver high performance and cost effective solution. Copper wire bonding is one of the hot topics on low cost alternative packaging materials. However, copper wire bonding is still not fully established and it requires significant engineering effort especially on the C65 low k, wafer with probed Al bond pads. A thin gold wire compared to copper wire will be a faster, simpler and more efficient packaging solution for low k device. In this paper, we covered the wire bond development of 17.5μm gold wire on laminate package. For wire bonding, material likes wire diameter and capillary were analyzed and wire bond process window was optimized. A series of Design of Experiments (DOE) have been conducted to determine the robust operating conditions that will maintain the long term reliability. Intermetallic coverage check has also been conducted on the optimized process window. Package reliability (MSL 3, HTS, uHast and TC) of thin gold wire bond has been assessed using C65 low k wafer technology. Bonding on probed bond pads on advance cantilever probe using 17.5 μm Au wire with 35 μm ball diameter has been performed. Wafers with 0 probe mark, 1× probe mark and 3× probes mark were specially arranged for these bonding evaluations. Bonding will be done directly on the probe mark imprint. Bonding assessment has been carried out on 300 K wire bonded per probe mark type. Package reliability assessment on different probe marks condition has been performed. Ball shear and wire pull results for high temperature storage (at 150degC) for 1000 hours will be shared. This paper discusses the process of developing a 17.5μm gold wire bonding on C65 low k Al bond pad with probe mark as an immediate alternate to low cost copper wire bond which require further development.
Keywords :
aluminium; design of experiments; gold; lead bonding; low-k dielectric thin films; semiconductor device packaging; semiconductor device reliability; Al; Au; C65 low k wafer technology; DoE; ball shear; bond pads; bonding assessment; cantilever probe; capillary; copper wire bonding; design of experiments; gold wire bonding; intermetallic coverage check; package reliability assessment; packaging materials; probe marks; semiconductor industry; size 17.5 mum; size 35 mum; temperature 300 K; time 1000 hour; wire bond process window; wire diameter; wire pull;
Conference_Titel :
Electronics Packaging Technology Conference (EPTC), 2010 12th
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-8560-4
Electronic_ISBN :
978-1-4244-8561-1
DOI :
10.1109/EPTC.2010.5702663