Impact of Epi-Si growth temperature on Ge-pFET performance

Author

Mitard, J. ; Martens, K. ; DeJaeger, B. ; Franco, J. ; Shea, C. ; Plourde, C. ; Leys, F.E. ; Loo, R. ; Hellings, G. ; Eneman, G. ; Wang, Wei-E ; Lin, J.E. ; Kaczer, B. ; DeMeyer, K. ; Hoffmann, T. ; DeGendt, S. ; Caymax, M. ; Meuris, M. ; Heyns, M.M.

Author_Institution

IMEC, Leuven, Belgium

fYear

2009

fDate

14-18 Sept. 2009

Firstpage

411

Lastpage

414

Abstract

In this study, we report a direct comparison between two epitaxial silicon processes: 500degC using SiH₄ and 350degC using Si₃H₈. Following four different metrics, we demonstrate that the reduction of silicon growth temperature results into the introduction of negatively charged defects possibly located at the Si/SiO₂interface. However, the Epi Si growth at 350degC with Si₃H₈ remains beneficial compared to a growth performed at 500degC-SiH₄ especially when thin EOT Ge pFETs are targeted.

Keywords

elemental semiconductors; epitaxial growth; germanium; power field effect transistors; semiconductor growth; silicon; Ge; Ge-pFET performance; Si; SiH₄; epi-Si growth temperature; epitaxial silicon processes; temperature 350 degC to 500 degC; Dielectrics and electrical insulation; High K dielectric materials; High-K gate dielectrics; III-V semiconductor materials; Inorganic materials; Interface states; Semiconductor films; Silicon; Temperature dependence; Temperature measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 2009. ESSDERC '09. Proceedings of the European

Conference_Location

Athens

ISSN

1930-8876

Print_ISBN

978-1-4244-4351-2

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2009.5331351

Filename

5331351