DocumentCode
2358517
Title
A sub-CV2 pad driver with 10 ns transition time
Author
Svensson, L.J. ; Athas, W.C. ; Wen, R.S.-C.
Author_Institution
Inf. Sci. Inst., Univ. of Southern California, Marina del Rey, CA, USA
fYear
1996
fDate
12-14 Aug 1996
Firstpage
105
Lastpage
108
Abstract
We describe an application of stepwise charging for driving off-chip signals. Our driver, designed for a chip built in a 0.8 μm bulk CMOS process, dissipates significantly less than CV2 per cycle while driving a 100 pF load to a 5 V swing with transition times as low as 10 ns. The transition time is adjustable; dissipation measured on a test chip ranges from 53% of CV2 at 16 ns to 70% at 10 ns. The target chip is approximately 6% larger with our driver than with a conventional one
Keywords
CMOS integrated circuits; driver circuits; 0.8 micron; 10 ns; 100 pF; 5 V; bulk CMOS process; low-power pad driver; off-chip signal; stepwise charging; sub-CV2 power dissipation; transition time; Atherosclerosis; Capacitance; Capacitors; Circuits; Drives; Equations; Inverters; Pulse generation; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1996., International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-7803-3571-6
Type
conf
DOI
10.1109/LPE.1996.546439
Filename
546439
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