Failure analysis of off-state leakage in high-voltage word-line decoder circuit of memory device

Author

Lai, K.W. ; Teng, A.S. ; Tu, C.H. ; Chang, T.Y. ; Hsueh, Julia ; Lee, Moo-Yeon ; Kuo, A. ; Chao, Y.H. ; Hu, Song ; Tzeng, U.J. ; Lu, C.-Y.

Author_Institution

Macronix Int. Co., Ltd., Hsinchu, Taiwan

fYear

2014

fDate

June 30 2014-July 4 2014

Firstpage

1

Lastpage

4

Abstract

After 500-hour HTOL reliability test on memory device, off-state leakage was found in nMOSFETs of word-line decoder. According to electrical and physical failure analysis on IC and device level, we found that holes were trapped in SiN of STI edge, which lowered threshold voltage of nMOSFETs and lead to off-state leakage from drain to source. The hole-traps came from anode gate low current flow and were trapped in SiN layer. The hole-traps could be annihilated by electron beams from SEM, and this phenomenon might mislead judgment during failure analysis. Detailed failure analysis, failure mechanism and corresponding improvement of circuit and process are presented in this paper.

Keywords

MOSFET; electron beams; failure analysis; hole traps; integrated memory circuits; scanning electron microscopy; semiconductor device reliability; silicon compounds; HTOL reliability test; SEM; STI edge; SiN; anode gate; current flow; electrical failure analysis; electron beams; high-voltage word-line decoder circuit; hole traps; memory device; nMOSFET; off-state leakage; physical failure analysis; Anodes; Decoding; Electron traps; Failure analysis; Logic gates; Stress; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits (IPFA), 2014 IEEE 21st International Symposium on the

Conference_Location

Marina Bay Sands

ISSN

1946-1542

Print_ISBN

978-1-4799-3931-2

Type

conf

DOI

10.1109/IPFA.2014.6898183

Filename

6898183