DocumentCode :
2359093
Title :
Hades-towards the design of an asynchronous superscalar processor
Author :
Elston, C.J. ; Christianson, D.B. ; Findlay, P.A. ; Steven, G.B.
Author_Institution :
Div. of Comput. Sci., Hertfordshire Univ., Hatfield, UK
fYear :
1995
fDate :
30-31 May 1995
Firstpage :
200
Lastpage :
209
Abstract :
This paper uses Hades, a generic processor architecture aimed at single and multiple-instruction-issue asynchronous implementations, to illustrate some of the difficulties encountered in asynchronous processor design. Particular emphasis is placed on a decoupled operand forwarding mechanism which allows the last result of each functional unit to be forwarded to following instructions, yet completely separates forwarding from the register writeback operation
Keywords :
computer architecture; logic design; Hades; asynchronous processor design; asynchronous superscalar processor; decoupled operand forwarding; generic processor architecture; register writeback; Clocks; Computational modeling; Computer architecture; Computer science; Concurrent computing; Delay; Process design; Registers; Silicon; Temperature;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Asynchronous Design Methodologies, 1995. Proceedings., Second Working Conference on
Conference_Location :
London
Print_ISBN :
0-8186-7098-3
Type :
conf
DOI :
10.1109/WCADM.1995.514657
Filename :
514657
Link To Document :
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